• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
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    • 专利摘要:
    The present invention relates to an MPEG decoder and a control method, and to store decoded data of a B picture, which is a bidirectional predictive coded image, which is generated through an I picture which is an intra frame coded image of the MPEG decoder and a P picture that is a forward predictive coded image between frames. The B picture memory area for storing the B picture has a storage capacity of 1/2 of the maximum size of data generated when the B picture is decoded, and provides a method of controlling the same. It is possible to store the decoded entire B-picture and display the stored data by using only one-half the size of the memory area required to store the data, and to use the other half of the memory area as other data storage area.
    公开号:KR19990070931A
    申请号:KR1019980006097
    申请日:1998-02-26
    公开日:1999-09-15
    发明作者:김영노
    申请人:구본준；엘지반도체 주식회사；
    IPC主号:
    专利说明:

    MPEG decoder and control method
    BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an MPEG decoder, and more particularly, to store decoded data of a B picture, which is a bidirectional predictive coded image, which is generated through an I picture, which is an intra-frame coded image, and a P picture, which is an inter prediction frame. A B picture memory area and a control method thereof.
    MPEG (Moving Picture Experts Group) is the name of the international standard for moving picture compression technology. MPEG includes MPEG-1, MPEG-2, and MPEG-SI. MPEG-2 is the most common technology and MPEG-4 is currently being standardized. A representative hardware for implementing the MPEG-2 technology is an MPEG decoder, which compresses and stores an input video signal and reproduces the same.
    Picture types handled by MPEG decoder include I picture, P picture, and B picture.
    An I picture (Intra Picture) is a picture encoded only with information of a corresponding picture, and is generated without using inter-frame prediction. At least one I picture is required for random access in a unit group of pictures (GOP).
    A P picture (Predictive Picture) is an abbreviation of a predicated encoded picture and refers to a forward predicted encoded picture between frames, and is encoded in the same order as the original picture. It is generated by performing prediction from an I picture or another P picture.
    Bidirectionally predictive picture refers to a bidirectional predictively encoded image. I and P pictures are created first, and B pictures are created using these I pictures and P pictures. This B picture is a screen produced by bidirectional prediction, which is characteristic of an MPEG.
    Bidirectional prediction includes forward prediction from the future, as well as backward prediction from the future. Either way, the coding system having this is higher than the coding system without B pictures, and the encoding freedom is higher and the prediction efficiency is improved.
    The MPEG decoder requires at least 2MB (megabyte) of external memory for the video restoration. 1 shows a memory map of a 2 megabyte capacity used in an MPEG decoder. The 2MB memory area is divided into four areas. Among them, a memory area of 507KB is allocated to store decoded I pictures, P pictures, and B pictures, and the remaining areas are allocated to store encoded bit streams and OSD (On Screen Display) data.
    The memory area of 507KB is required to store one picture because the size of data required to implement one frame in the NTSC method is 720 x 480 x 1.5 = 518,400 bytes. In this case, 1.5 means that two blocks for chrominance are added in addition to the four blocks constituting the original macro block.
    As DBS (Direct Broadcasting Satellite), which is a direct broadcast via satellite, is activated, additional data that requires separate memory areas such as OSD data and audio data is increasing. Therefore, encoded bitstreams, OSD data, audio data, etc. The memory area for storing must also increase together. However, rather than increasing the size of the entire memory area, it would be desirable to improve the existing memory operating method to operate the limited memory area more efficiently.
    Therefore, the size of the memory area allocated to the decoded pictures I, P, and B can be reduced, and the spare memory area thus created can be used to store OSD data or encoded bitstreams. However, in view of the peculiarities of MPEG 2, it is practically impossible to reduce the memory area of I and P pictures. The reason for this is that, as described above, the B picture is made by using the I picture and the P picture, so that the entire data of the I picture and the P picture must always exist in the memory until the output of one GOP is completed. After all, the shrinkable memory area is a storage area of the B picture. This is fully possible since the B picture is not used at all for prediction of another picture, and once output, it is no longer necessary to exist in memory.
    Accordingly, an object of the present invention is to provide an MPEG decoder and a control method capable of storing an entire decoded B picture using only one-half the size of a memory area required to store one decoded B picture. .
    BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram showing a memory map of 2 megabyte capacity used in MPEG decoder.
    2 is a block diagram showing a field picture structure handled in an MPEG decoder.
    3 is a diagram illustrating a correlation between a decoding order and a display order of a field picture, and a B picture memory region in an MPEG decoder according to the present invention;
    4 is a block diagram illustrating a frame picture structure handled in an MPEG decoder.
    5 is a diagram illustrating a correlation between a decoding order and a display order of a frame picture and a B picture memory region in an MPEG decoder according to the present invention;
    Explanation of symbols on the main parts of the drawings
    T, T1-T32: Top field B, B1-B32: Bottom field
    C1 to C5: Field cycle U: Upper frame
    L: subframe
    To this end, the present invention provides a B picture memory region for storing decoded data of an I picture, which is an intra frame coded image of an MPEG decoder, and a B picture, which is a bidirectional predictive coded image that is generated through a P picture, which is an inter prediction frame. It has a storage capacity of 1/2 of the maximum size of data generated when decoding this B picture.
    A preferred embodiment for controlling the MPEG decoder of the present invention having such hardware characteristics will be described below with reference to FIGS. 2 to 5.
    2 is a block diagram illustrating a field picture structure handled by an MPEG decoder. 2 (1) and 2 (2) are B picture 1 and B picture 2, respectively, for convenience, each B picture is a top field T1 (T2) of 240 scan lines and a bottom field of 240 scan lines, respectively. It divides into (B1) (B2). In the field picture structure, since the top field is first decoded and then the bottom field is decoded, each B picture is divided into a top field (T1) and a bottom field (B1) (B2) for easy understanding. will be.
    FIG. 3 is a diagram illustrating a correlation between a decoding order and a display order of a field picture, and a B picture memory region in a MPEG decoder according to a field cycle. 3 (1) is a field cycle, FIG. 3 (2) is a picture decoded at each field cycle, FIG. 3 (3) is a displayed picture, and FIG. 3 (4) is a B picture memory region.
    Each picture is decoded in the order of I, P, B1, B2, and B3. However, the display of the decoded picture proceeds in the order of I, B1, B2, and B3. When processing a picture of a field structure, the object and the order to be decoded are the same as the object and the order to be displayed. That is, the top field T and the bottom field B of each picture are sequentially decoded, and the display is also performed in the order of the top field T and the bottom field B of each picture.
    However, there is some delay between the timing actually decoded and the timing being displayed. That is, during the first half cycle of one field cycle, the field is decoded, the decoded field is displayed during the next half cycle, and the field of the next picture is decoded and stored in an empty memory area generated as the display proceeds.
    The MPEG decoder of the present invention decodes an I picture during the first field cycle C1, a P picture during the second field cycle C2, and a first B picture during the third field cycle C3, as shown in FIG. In-picture B picture 1 is decoded, and a second B picture B picture 2 is decoded during the fourth field cycle C4. The display starts from the second half half of the second field cycle C2.
    That is, no display is performed during the first field cycle C1, and only the top and bottom fields of the I picture are decoded and stored in the I picture memory area. The display is not performed even in the high level section of the second field cycle C2. The top field of the P picture is decoded and stored in the P picture memory area. The top field of the decoded I picture is displayed from the low level section of the second field cycle C2, during which the bottom field of the P picture is decoded and stored in the P picture memory area.
    In the high level section of the third field cycle C3, the bottom field of the I picture is displayed. In the meantime, the top field T1 of B picture 1 having 240 scan lines is decoded and stored in the B picture memory area. In the low level section of the third field cycle C3, the top field T1 of the B picture 1 is displayed. In this way, the bottom field B1 of the B picture 1 is decoded and stored in an empty memory area generated by displaying the top field T1. That is, the top field T1 is displayed and the bottom field B1 is simultaneously decoded.
    In the high level section of the fourth field cycle C4, the bottom field B1 of the B picture 1 is displayed. The top field T2 of B picture 2, which is the second B picture, is decoded and stored in an empty memory area generated by displaying the bottom field B1 of B picture 1. FIG. In the low level section of the fourth field cycle C4, the top field T2 of the B picture 2 is displayed. The bottom field B2 of B picture 2 is decoded and stored in an empty memory area generated by displaying the top field T2 of B picture 2.
    In the high level section of the fifth field cycle C5, the bottom field B2 of the B picture 2 is displayed. The top field T3 of B picture 3, which is the third B picture, is decoded and stored in an empty memory area generated by displaying the bottom field B2 of B picture 2.
    As can be seen from the above description, the MPEG decoder having a 1/2 size B-picture memory area according to the present invention can decode and display a picture of a field structure without difficulty.
    4 is a block diagram illustrating a frame picture structure handled by an MPEG decoder. 4 (1) and 4 (2) are B picture 1 and B picture 2, respectively. For convenience, each B picture is divided into upper and lower frames of 240 scan lines. In the frame picture structure, since the upper frame is first decoded and then the lower frame is decoded, each B picture is divided into the upper frame and the lower frame for easy understanding.
    FIG. 5 is a diagram illustrating a correlation between a decoding order and a display order of a frame picture, and a B picture memory region based on a field cycle in the MPEG decoder according to the present invention. 5 (1) is a field cycle, FIG. 5 (2) is a picture decoded at each field cycle, FIG. 5 (3) is a displayed picture, and FIG. 5 (4) is a B picture memory region.
    Each picture is decoded in the order of I, P, B1, B2, and B3. However, the display of the decoded picture proceeds in the order of I, B1, B2, and B3. When processing a picture of a frame structure, the object and the order to be decoded and the object and the order to be displayed do not match. That is, the top field and bottom field of the upper frame of each picture are first decoded, and the top field and the bottom field of the lower frame are decoded first, but the display is divided into the top field (T) and the bottom field (B). Proceed in order. Therefore, the decoding speed should be much faster than the display speed. In the current spec 2 specification, the decoding speed is actually faster than the display speed.
    There is some delay between the timing to be decoded and the timing to be displayed. In addition, there may be some delay in the timing of decoding of the upper and lower frames of the picture during the field cycle. That is, the decoding of the upper frame does not necessarily mean that the decoding of the lower frame is continuously performed, and there may be some time interval therebetween. This temporal spacing can also occur between two adjacent field cycles. That is, decoding of lower frames not advanced in the previous field cycle may be performed before decoding of upper frames of the next field cycle starts. This flexible decoding timing is possible because the decoding speed of the MPEG decoder is relatively faster than the display speed.
    The display, however, displays the top field throughout the first half cycle of one field cycle, and the bottom field throughout the second half cycle.
    In FIG. 5, an I picture is decoded during the first field cycle C1, and a P picture is decoded during the second field cycle C2. During the third field cycle (C3), the entire upper frame and a part of the lower frame of the first B picture, B picture 1, are decoded, and during the fourth field cycle (C4), the entire upper and lower frames of the second B picture, B picture 2, are decoded. Decode a portion of the frame. The display starts from the second half half of the second field cycle C2.
    No display is performed in the first field cycle (C1) section. In the meantime, the upper frame and the lower frame of the I picture (divided by U and L in the figure) are sequentially decoded and stored in the I picture memory area.
    No display is performed even in the high level section of the second field cycle C2. During this time, the upper frame of the P picture may be decoded, and a part of the lower frame may be decoded. The decoded picture data is stored in the P picture memory area. In the low level section of the second field cycle C2, the top field of the decoded I picture is displayed, and the decoding of the lower frame of the P picture is completed in this section.
    In the high level section of the third field cycle C3, the bottom field of the I picture is displayed. In the meantime, the upper and lower frames of the first B picture B picture 1 are sequentially decoded. In this interval, all upper frames are decoded, and lower frames are partially decoded. The upper frame of the decoded B picture 1 is divided into a top field T and a bottom field B and stored in the B picture memory area. The decoded data is stored in a B picture memory area in which the top fields T1 to T8 and the bottom fields B1 to B8 each have 120 scan lines, each of which can store decoded data of 240 scan lines.
    In the low level section of the third field cycle C3, the top fields T1 to T8 of B picture 1 stored in the B picture memory area are displayed. Therefore, the area where the top fields T1 to T8 are stored in the B picture memory area becomes blank as the display proceeds. The top field T9 to T12 and the bottom field B9 to B12 of 60 scan lines of the lower frames of the B picture 1 are decoded and stored in the empty area of the B picture memory area thus generated.
    In the low level section of the third field cycle C3 where such an operation is performed, all the top fields T1 to T16 of the 240 scan lines of the B picture 1 should be displayed. However, since only 180 scan lines of the T1 through T12 fields are stored in the B-picture memory area, a memory area of the 60 scan lines from T13 to T16 is further decoded and stored. At this time, the top field of 60 scan lines of T13 to T16 is decoded and stored in an empty area of the B picture memory area generated by displaying the top field of 60 scan lines from T9 to T12, and the top field of T9 to T12 is stored. When the display is completed, the top field of T13 to T16 is displayed continuously. As a result, all of the top fields T1 to T16 of the 240 scan lines of the B picture 1 are displayed.
    However, at this time, the bottom fields B13 to B16 having the same size are generated during the decoding of the top fields T13 to T16 of the 60 scan lines of the B picture 1, and the bottom fields B13 to B16 are displayed in the B picture memory area. There is no free area to save it. Therefore, after completing the display of the top fields T13 to T16 and before decoding the upper memory area of the second B picture B picture 2 in the fourth field cycle C4, the bottom fields B13 to B16 of the B picture 1 Decode At this time, the problem does not occur because the top fields T13 to T16 of the B picture 1 are already displayed and a sufficient memory area is secured.
    As already mentioned, the time for decoding a frame at the decoder is shorter than the time for displaying the decoded frame. Therefore, even during the fourth field cycle C4 allocated to the decoding time of the B picture 2, there is a small amount of spare time, so the bottom field B13 to the B picture 1 that has not been decoded in the previous field cycle C3 by using the spare time. B16) is decoded.
    During the remaining time of the high level section of the fourth field cycle C4, the display of the B picture 1 is completed by displaying the bottom fields B1 to B12 of the B picture 1 stored in the B picture memory area. In fact, the display of B picture 1 is sufficiently possible by decoding the bottom fields B13 to B16 of the lower frame of B picture 1 while displaying the front part of the bottom field of B picture 1.
    In other words, while the bottom fields B1 to B12 of B picture 1 stored in the B picture memory area are displayed, the barb fields B13 to B16 of the lower frame of B picture 1 are decoded, and then immediately higher than B picture 2 to be decoded. Decode the frame. While decoding the upper frame of B picture 2, the bottom fields B13 to B16 of B picture 1 stored in the B picture memory area are displayed to complete the display of all the bottom fields B1 to B16 of B picture.
    In the empty memory area generated by displaying the bottom fields B1 to B8 of the upper frame of the B picture 1, the top fields T17 to T20 of the 60 scan lines and the bottom fields of the 60 scan lines of the upper frame of the B picture 2 are respectively displayed. B17 to B20) are decoded and stored. Also, the top fields T21 to T22 and the 30 bottom fields B21 to B22 of 30 scan lines among the upper frames of B picture 2 are decoded in the empty memory area generated by displaying the bottom fields B9 to B12 of B picture 1. Save it. In the empty memory area generated by displaying the bottom fields B13 to B16 of the B picture 1, the top fields T23 to T24 of the 30 scan lines of the upper frame of the B picture 2 and the bottom fields B23 to B24 of the 30 scan lines are displayed. ) And decode it. This completes the decoding of the upper frame of the B picture2.
    In the low level section of the fourth field cycle C4, the top fields T17 to T20 of the upper frame of the B picture 2 are displayed. In addition, the top field T25 to T26 of the lower frame and the bottom field of 30 scan lines are displayed in an empty memory area of 60 scan lines generated by displaying the top fields T17 to T20 of the upper frame of B picture 2. Decode and store (B25 to B26).
    In this section, the top fields T21 to T24 of the upper frame of the B picture 2 are displayed. 30 top fields T27 to T28 and 30 scan line bottom fields (B27 to B28) of the lower frame in an empty memory area of 60 scan lines generated by displaying the top fields T21 to T24 of the upper frame of B picture 2. ) And decode it. During this time, the top fields T25 to T26 of the lower frame of the B picture 2 are displayed.
    The top fields T29 to T30 of the 30 scan lines of the lower frame are decoded and stored in an empty memory area of 30 scan lines generated by displaying the top fields T25 to T26 of the lower frame of the B picture 2. In addition, the top fields T27 to T28 of the upper frame of the B picture 2 are displayed, and the top fields T31 to T32 of the 30 scan lines of the lower frame are decoded and stored in an empty memory area having a size of 30 scan lines. . At this time, the bottom fields B29 to B32 decoded together with the top fields T29 to T32 are discarded without being stored in the memory area, which is processed in the high level section of the next fifth field cycle C5.
    Before starting to decode B picture 3 in the high level section of the fifth field cycle C5, the low level section of the fourth field cycle C4 in the empty area generated by displaying the top fields T29 to T32 of B picture 2. Decodes and stores the bottom fields B29 to B32 of B picture 2 that could not be decoded (decoded and discarded), and then starts decoding B picture 3. The other bottom fields B28 to B28 of B picture 2 are displayed while the bottom fields B29 to B32 of B picture 2 are decoded, so that no problem occurs in timing dimension.
    It is true that the MPEG decoder produces a plurality of P pictures using one I picture, and generates more B pictures using this I picture and a plurality of P pictures. However, since inserting too many B pictures between an I picture and a P picture generates a large number of B pictures using one I picture and one P picture, this causes a deterioration of the output image. Therefore, when outputting an image using an MPEG decoder, it is common to produce only two B pictures using one I picture and one P picture, and to generate up to three B pictures. Therefore, it can be seen that the present invention can be sufficiently realized by referring to only three B pictures in the above-described embodiment of the present invention.
    Therefore, according to the present invention, it is possible to store the decoded entire B picture and display the stored data using only one-half the size of the memory area for storing the B picture. The memory area of 2 can be used as other data storage area.
    权利要求:
    Claims (7)
    [1" claim-type="Currently amended] A B picture memory region for storing decoded data of a B picture, which is a bidirectional predictive coded picture, which is generated through an I picture that is an intra frame coded image of an MPEG decoder and a P picture that is an inter prediction frame coded between frames
    An MPEG decoder having a storage capacity of one half of a maximum size of data generated when the B-picture memory region decodes the B-picture.
    [2" claim-type="Currently amended] A B picture memory region for storing decoded data of a B picture, which is a bidirectional predictive coded picture, which is generated through an I picture that is an intra frame coded image of an MPEG decoder and a P picture that is an inter prediction frame coded between frames, is decoded of the B picture. A MPEG decoder control method for decoding and displaying a B-picture of a field structure in an MPEG decoder having a data storage capacity of 1/2 of a maximum size of data,
    Decoding a top field and a bottom field of the I picture;
    Decoding the top field of the P picture;
    While displaying the top field of the I picture, decoding the bottom field of the P picture;
    While displaying the bottom field of the I picture, decoding the top field of the first B picture and storing it in the B picture memory area;
    Displaying the top field of the first B picture and decoding and storing the bottom field of the first B picture in an empty memory area generated by displaying the top field of the first B picture;
    And decoding and storing the top field of the second B picture in an empty memory area generated by displaying the bottom field of the first B picture and displaying the bottom field of the first B picture.
    [3" claim-type="Currently amended] A B picture memory region for storing decoded data of a B picture, which is a bidirectional predictive coded picture, generated through an I picture that is an intra frame coded image of an MPEG decoder and a P picture that is an inter prediction frame coded between frames, is decoded of the B picture. A MPEG decoder control method for decoding and displaying a B-picture of a frame structure in an MPEG decoder having a data storage capacity of 1/2 of a maximum size of data,
    Decoding the upper frame and the lower frame of the I picture;
    Decoding the upper and lower frames of the P picture;
    Displaying a top field of the I picture;
    Displaying a bottom field of the I picture and storing a top field and a bottom field of an upper frame of a first B picture in the B picture memory area;
    Displaying the top field of the upper frame of the first B picture stored in the B picture memory area, and displaying the top field of the upper frame of the first B picture in the empty memory area of the first B picture. The first 2/4 top field and the first 2/4 bottom field of the lower frame are decoded and stored, and the first 2/4 top field of the lower frame of the first B picture is displayed while the first field is displayed. Decode and store the second two quarters of the top field of the lower frame of the first B picture in an empty memory area generated by displaying the first two quarters of the top field of the lower frame of the B picture; Displaying the second 2/4 top field when display of the top field of / 4 is completed;
    The bottom field of the upper frame of the first B picture and the first 2/4 bottom field of the lower frame are displayed, and the second 2/4 bottom field of the lower frame of the first B picture is decoded. The second 2/4 top field of the lower frame of the B picture is displayed and kept in an empty memory area, and the bottom field of the upper frame of the first B picture and the first 2/4 bottom field of the lower frame are displayed. Next, the second 2/4 bottom field of the lower frame of the first B picture is displayed and the bottom field of the upper frame of the first B picture is displayed. Decodes and stores the first 2/4 top field and the first 2/4 bottom field of the frame, and displays the first 2/4 bottom field of the lower frame of the first B picture. Decodes the second quarter top field and the second quarter bottom field of the upper frame of the second B picture in the empty memory area to display the second two quarter bottom field of the lower frame of the picture. Decoding and storing a third quarter top field and a third quarter bottom field of an upper frame of the second B picture in a generated empty memory area;
    And displaying the first 2/4 top field of the upper frame of the second B picture, and displaying the first 2/4 top field of the upper frame of the second B picture. Decode and store the first quarter top field and the first quarter bottom field of the lower frame of the B picture, and display the second two quarters top field of the upper frame of the second B picture, The second 1/4 top field and the second 1/4 of the lower frame of the second B picture are displayed in an empty memory area generated by displaying the second 2/4 top field of the upper frame of the second B picture. Decodes and stores the bottom field, displays the first quarter top field of the lower frame of the second B picture, and displays the first quarter top field of the lower frame of the second B picture. The second B in an empty memory area Decodes and stores the third quarter top field of the lower frame of the picture; displays the second quarter top field of the lower frame of the second B picture; Decoding and storing a fourth quarter top field of a lower frame of the second B picture in an empty memory area generated by displaying a first quarter top field;
    The third quarter bottom field of the second B picture and the fourth quarter of the second quarter B picture in the empty area generated by displaying the third quarter top field and the fourth quarter top field of the second B picture. And decoding each bottom field and storing the MPEG decoder.
    [4" claim-type="Currently amended] The image of claim 1, wherein the first B picture is displayed in an empty memory area generated by displaying the top field of the first B picture, and then displaying the second two-fourth top field of the lower frame of the first B picture. An MPEG decoder control method of decoding and storing a second 2/4 bottom field of a lower frame.
    [5" claim-type="Currently amended] 5. The method of claim 4, wherein the second 2/4 bottom field of the lower frame of the first B picture is decoded and the upper frame of the second B picture is decoded.
    [6" claim-type="Currently amended] 4. The method of claim 3, wherein the fourth quarter field of the lower frame of the second B picture is decoded and stored in an empty memory area generated by displaying the fourth quarter top field of the lower frame of the second B picture. MPEG decoder control method.
    [7" claim-type="Currently amended] The MPEG decoder control method according to claim 6, wherein the fourth quarter bottom field of the lower frame of the second B picture is decoded and stored, and the upper frame of the third B picture is decoded.
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    同族专利:
    公开号 | 公开日
    KR100306903B1|2001-11-30|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    1998-02-26|Application filed by 구본준, 엘지반도체 주식회사
    1998-02-26|Priority to KR1019980006097A
    1999-09-15|Publication of KR19990070931A
    2001-11-30|Application granted
    2001-11-30|Publication of KR100306903B1
    优先权:
    申请号 | 申请日 | 专利标题
    KR1019980006097A|KR100306903B1|1998-02-26|1998-02-26|Mpeg decoder and control method thereof|
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